1. Field of the Invention
The present invention relates to a substrate for an electronic device and an electronic device.
2. Description of the Related Art
In electronic devices such as various scales of integrated circuits, various types of semiconductor elements and chips thereof, for example, there has been employed a method of disposing an element on a substrate and connecting them by means of wire bonding or the like. However, this method not only requires the process of wire bonding but also increases the mounting area with the number of elements, so that the signal delay increases because of an increase in wiring length.
Therefore, there has been proposed a TSV (through-silicon-via) technology of providing a substrate with through-electrodes and replacing the conventional wire bonding with the through-electrodes. Japanese Unexamined Patent Application Publication Nos. 11-298138, 2000-228410, 2002-158191 and 2003-257891 disclose a through electrode formation technology essential for the TSV technology. The superiority of the TSV technology over the wire bonding is as follows.
At first, the number of connections is limited to 100 to 200 in the wire bonding, but the use of the TSV technology makes it possible to arrange connecting through electrodes at intervals of the order of μm, increasing the number of connections to several thousand.
In addition, there can be obtained advantages as follows: since connection distance can be minimized, it is less likely to be affected by noise; since parasitic capacitance and resistance are low, it is possible to reduce delay, attenuation, or waveform degradation; an additional circuit is not required for amplification or electrostatic breakdown protection; and with these advantages, there can be realized high speed action and low power consumption of the circuit.
The use of the TSV technology makes it possible to obtain not only an electronic device including an analog or digital circuit, a memory circuit such as a DRAM, a logic circuit such as a CPU or the like but also an electronic device including different types of circuits such as an analog high frequency circuit and a low frequency, low power consumption circuit prepared in different processes and stacked together.
By applying the TSV technology to a three-dimensional integrated circuit (3D-IC), many functions can be packed into a small footprint. In addition, important electrical pathways between elements can be dramatically shortened to increase processing speed.
In order to apply the TSV technology, a via (through electrode) must be formed. For this purpose, there has been widely used a method of forming a through electrode by Cu electroplating.
However, the electroplating decreases the production efficiency because of its inevitable long processing time. Moreover, since the via typically has an aspect ratio of 5 or more and usually has a rugged inner wall surface, it is difficult to uniformly form a plating primary film over the inner wall surface of the via. This produces a void or gap between the inner wall surface of the via and a plating film to be used as the through electrode, thereby causing an increase in electrical resistance, decreased reliability and so on. Furthermore, there is also such a limit that the electrical resistance cannot be set lower than the inherent electrical resistance of Cu.
Still furthermore, the progress in improving the packaging density, the performance and the processing speed and reducing the size, the thickness and the weight of the electronic device because of the use of the TSV technology not only increases heat that will be generated by the operation but also makes it difficult to prepare a heat dissipation structure for it, so that the question of how to dissipate heat becomes a major issue. If the heat dissipation is insufficient, accumulation of the generated heat leads to abnormal heat generation, impairing bonding strength of the electronic component and damaging reliability of the electrical connection or changing electrical characteristics of the electronic component and at worst, causing thermal runaway, thermal breakdown or the like.
As such a heat dissipation means, there have been known various types of technologies. For example, Japanese Unexamined Patent Application Publication No. 2008-294253 discloses a technology of forming a heat transmission via conductor by filling a conductive paste including Ag powder. On the other hand, Japanese Unexamined Patent Application Publication No. 2005-158957 discloses a technology of forming a thermal via, wherein the thermal via comprises a metal (copper, solder or gold) having a good thermal conductivity and a via is formed from an upper surface of a light-emitting element submount structure, the via is coated with gold at its side face and then filled with solder. Japanese Unexamined Patent Application Publication No. 10-098127 discloses a thermal conductor comprising a metal powder-containing resin such as a silver paste or a copper paste, a composite of a metal rod and the metal powder-containing resin or the like. Moreover, Japanese Unexamined Patent Application Publication No. 2007-294834 discloses a thermal via comprising a metal such as Cu or Ni. However, any related art has a problem to be solved, such as improvement in heat dissipation characteristics, manufacturing cost reduction or the like.